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DFx Architect & Design Engineer

161937
San Jose, CA, United States
Dec 21, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

 

Job Description

  • DFx Architecture for Xilinx’s next generation monolithic and stacked SoC product families
      • Including testability, debug, characterization, repair and yield
  • Develop IPs and methodologies for all of the above
    • Including process characterization IP (timing, defectivity etc.) for test-vehicles
  • Define constraints and dependencies for IPs based on block interfaces, power supply & configuration requirements
  • Optimize overall product cost by modeling and analyzing die vs test costs
  • Work with functional IP teams on integration, analysis and qualification methodologies for a growing number of DFx IPs, tools and flows

 

#mh

Job Qualifications

  • BS with 5+ years of exp or MS with 3+ years of exp or PhD in Electrical Engineering, Computer Engineering or related equivalent 
  • Desired skills
      • RTL design, timing constraints and design methodologies
      • Scan design, ATPG, Memory BIST, Repair and harvesting for yield
      • Design qualification – RTL-DRC, STA, CDC, RDC, Constraints checking
      • Design verification – Verilog simulation, coverage analysis, assertions
      • Programming experience – Perl, TCL, Python
      • Basic circuit design and analysis
      • Algorithms design and analysis

 

Xilinx is a US federal government contractor and subcontractor. As required by Executive Order, our US employees are required to be fully vaccinated against COVID-19 regardless of the employee’s work location or work arrangement (e.g., telework, remote work, etc.), subject to such exceptions as required by law. If selected, you will be required to be vaccinated against COVID-19 and submit documentation of proof of vaccination or have an approved accommodation by December 8, 2021

 

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