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Staff Analog/Mixed-Signal Design Engineer

161650
San Jose, CA, United States
Nov 15, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

Job Description

Xilinx Serdes Technology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an analog/mixed-signal design engineer to join our world-class team.

 

The candidate will be responsible for the design of high-speed ADC-based receivers, DAC-based transmitters, or silicon photonics transceivers.

 

- Define circuit architectures optimized for high bandwidth electrical and optical links

- Perform link level simulation in Matlab and/or SPICE to prove the architecture

- Perform design and modeling of on-die RF passive components (e.g., inductors and capacitors) and/or optical structures

- Design circuit components (e.g., DAC, SAR-ADC, S/H, Analog Front-End, PLL, reference generation, clock distribution) required to implement the architecture in advanced FinFET process

 

BS with 8+ years of exp or MS with 6+ years of exp or PhD with 3+ years of exp in Electrical Engineering or Computer Engineering or related equivalent.

Successful candidate needs to demonstrate the following

  • Strong background in analog and mixed-signal circuit design
  • Strong teamwork and communication skills

 

 

Xilinx is a US federal government contractor and subcontractor. As required by Executive Order, our US employees are required to be fully vaccinated against COVID-19 regardless of the employee’s work location or work arrangement (e.g., telework, remote work, etc.), subject to such exceptions as required by law. If selected, you will be required to be vaccinated against COVID-19 and submit documentation of proof of vaccination or have an approved accommodation by December 8, 2021.

  • History of coming up with innovative circuit design/architecture is a plus
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