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Senior Staff Design Engineer

161549
Hyderabad, India, India
Nov 29, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

Xilinx is looking for a talented individual to join the high speed memory interfaces design engineering group, in the position of Staff Design Engineer to work on the modelling of next generation memory controllers and network on a chip bus.

 

The successful candidate will work as a contributing member responsible for the architecture and design of next generation memory controller models for Xilinx customers. Responsibilities include System Verilog/System C coding, architecting, implementing, documenting and validating the models. The area of focus would be on controllers like DDR4, DDR5, LPDDR4, LPDDR5 & HBM. The candidate must have excellent inter-personal and communication skills and be able to work independently.

 

Xilinx holds a strong position in the FPGA all programmable paradigm. This position offers candidates exposure to the latest generation IP, tools, boards, FPGA products and the ability to design and develop high speed memory IP cores.

 

Job Requirements:

  • B.E/M.E/M.Tech or B.S/M.S in EE/CE with 9+ years of experience in BFM modeling and functional verification
  • Experience in developing System-Verilog based verification environment using industry standard methodologies like OVM/UVM
  • Expertise in behavioral modelling of the functional blocks using System-Verilog
  • Experience in AXI bus or NOC bus based multi-master & slave systems
  • Knowledge of DRAM memory controllers and user traffic patterns for bandwidth & latency analysis
  • Strong working knowledge of UNIX environment and scripting languages such as Perl, Tcl & Python
  • Good waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi and ModelSim
  • Excellent communication and problem solving skills
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