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Deep Learning IP Design Engineer

161016
Beijing Shi, China, China
Sep 16, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

This position is provided for Xilinx deep learning acceleration IP development, you will have the chance to build / verify and implement the acceleration IP with verilog RTL or AIE programming for state of the art deeplearning algrithms. 

 

Requirements

1. Degree of M.S or Ph.D in computer science / electronic engineering / micro-electronics.
2. More than 3 years’ experience on complex hardware logic design.
3. Strong design / implementation skills in Verilog. 
4. Good learning competency and self-motivated
5. Fluent English

Preferred knowledge and experience:
1. Experience on computer architecture or micro-architecture design.
2. Experience on deep learning aligrithms or neural networks.
3. Experience on Xilinx AIE programming development.

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