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Product Characterization Development description
- Building framework and infrastructure to streamline pin timing characterization development
- Takes full responsibility of validating any characterization or customer application issue with minimal guidance.
- Takes responsibility for isolating the issue to a specific area such as test gap, SW bug, silicon bug, or process deviation using ATE and/or bench setup
- Analyze characterization results and create characterization report
- Possesses good understanding of how FPGA features are used and implemented by Xilinx SW tools in typical applications.
- Establishes block ownership for characterization in the V&C process. This includes the validation of silicon and the accuracy of related SW tools.
- Represent characterization in the cross functional team, including Design, Test and Software team.
- Demonstrates fluency in the application of different characterization test methodologies to appropriate tests with minimal guidance.
- Responsible for resolving any issues that arise in the characterization or production environment.
- Generates automation scripts where applicable for efficiency improvements.
- Bachelor/Master Degree in Electrical/Electronic Engineering, 3 or more years of experience
- Good understanding of timing characterization
- Experience with FPGA design flow and timing closure
- Experience on Functional (Digital) characterization
- Strong data analysis skill as well as proficiency on data analysis tool e.g. JMP, Microsoft tools
- Experience in Linux environment and writing/using scripting languages such as Perl, Tcl, etc.
- Strong communication skills, works well in a group environment that spans across continents
- RTL knowledge for content creation & debug, including logic and state machine implementation, and Vivado SW knowledge is a plus