Following is the Job Specs :
- Excellent knowledge of SV/UVM
- Strong Verification fundamentals and strong debugging skills
- Good knowledge of assertions and functional coverage coding and closure.
- Good knowledge on code coverage analysis and closure.
- Good knowledge of any scripting language
- Experience of 8-12 years.
- Experience with gate level simulation, power aware simulation is a plus.
- Experience in formal verification is a plus.
- Good Knowledge of AXI Protocol
- Prior work experience on processor verification is a plus
- Good Communication Skills
Education Requirements : B.Tech / M.Tech
Years of Experience : 8-12 years of relevant experience