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Design Engineer - SoC Integration

160457
San Jose, CA, United States
May 17, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

 

Job Description

As a member of the SoC Physical Integration team, you'll interface with various engineering groups, including architecture, design, CAD, software, and product engineering, across various geographies to work towards the physical/electrical verification and tape out of Xilinx SoC FPGA/ACAP devices. Common essential duties and responsibilities include, but are not limited to: 
 
- Defining and developing flows and methodologies for chip level integration
- Developing tools for design verification or efficiency
- Designing (RTL and custom), verifying, and integrating FPGA/ACAP sub-blocks
- Coordinating activities between different design groups to ensure smooth integration
- Executing chip level physical verification
- Executing chip level electrical verification

 

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Job Qualifications

- Basic understanding of FPGA architecture
- Knowledge of and/or experience with design and verification tools such as Virtuoso and Calibre
- Knowledge of and/or experience with P&R tools
- Fundamental circuit design knowledge including simulation experience with Spice and Verilog
- Strong debug skills
- Scripting experience using Perl, Python, TCL, C-shell, Make and/or other scripting languages
- Knowledge and experience with basic Unix data management and job control
- Excellent written and oral communication skills

Education Requirements

BS with 2+ years of exp or MS in Electrical Engineering or Computer Engineering or related equivalent

 

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