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Staff Product Engineer - FPGA Implementation

160024
San Jose, CA, United States
Mar 26, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

The Staff Product Management Engineer position is in the FPGA Implementation Software group, located in San Jose (California) or Longmont (Colorado), for an application engineer to focus on place-and-route tools feature roadmap definition, specification, validation, documentation, train the trainer material and key customers support. Under the supervision of experienced Product Engineers, the successful candidate will work closely with several R&D teams, internal application design teams and tier-1 customers to improve FPGA compilation software quality of results and ease of use in order to enable the next generation of designs across the UltraScale and Versal ACAP device families. Daily activities will include the following duties:

  • Deep-diving on new and critical tool issues seen by Vivado users internally and externally to identify work-arounds and future enhancements. Triaging reported issues in several Vivado product areas, such as flow, IDE, synthesis, implementation, netlist and device models, and help engineering address them effectively.
  • Actively exploring innovative methodologies and their impact on flow and design practices, with emphasis on synthesis (C/C++/RTL), logic optimization, placement, routing, timing closure, compile time.
  • Owning a Vivado product area, tracking product development schedules and issues, and validating the readiness of new or enhanced features in any new Vivado release.
  • Working closely with Xilinx Business Units (Data Center, Wired, Wireless, Emulation & Prototyping, Test Equipment) to improve their designs, products and customer experience.
  • Developing and delivering training materials on new features and methodologies.
  • Authoring high quality documentation tuned to the needs of the reader for their areas of expertise
  • Staying current with and proposing the internal use of industry approaches, algorithms, and practices

Qualifications:

  • Customer Awareness: Has excellent working knowledge of RTL-based design flows and expectations.
  • Product Knowledge: Has good working knowledge of the entire FPGA or ASIC design process and tool flow, with basic understanding in timing analysis and closure. Scripting experience (Tcl, Perl, Python) is desired.
  • Design Enablement: Has good understanding of design methodologies for timing closure and runtime reduction.
  • Problem Solving: Ability to handle and solve complex system level issues.
  • Technical Communication: Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear.

Education Requirement:

BS in Electrical Engineering, Computer Engineering or a related field with 8 plus years of relevant industry experience or MS in Electrical Engineering, Computer Engineering or a related field with 6 plus years of relevant industry experience .

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