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Senior Design Engineer

Edinburgh, Great Britain & Northern Ireland, United Kingdom
Jan 19, 2021


Job Description


At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology.  We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice.  From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world’s first 5G networks, we empower the world’s builders and visionaries whose ideas solve every day problems and enhance people’s lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you!  At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters – world class technology that improves the way we live and work.  We are ONEXILINX.

Xilinx Edinburgh is adding to its Data Centre design team. This is a fantastic opportunity for an engineer with a passion for algorithmic acceleration on FPGA or other architectures to join a team with access to world-class infrastructure and platforms to work on the next generation of accelerated applications and libraries.

You'll work in a team responsible for smart networking applications. Smart networking is increasingly used as part of algorithm acceleration by moving processing and decision making into the network itself. You would be part of this development team, leading to algorithms being taken directly to ASIC or FPGA.

This is an opportunity to work with leading-edge technologies such as Vivado HLS, Ultrascale + and Versal silicon, and Alveo accelerator cards for the data centre



  • Degree or better in Electronic Engineering, Computer science, or related subject

Skills and Experience


  • Experience in VHDL/Verilog ASIC and FPGA design required
  • Experience in high-level synthesis in C, C++ or OpenCL (beneficial).
  • Experience in other areas of heterogenous computing, including smart networking, would be an advantage.
  • Familiarity with Xilinx tools (including Vivado, Vivado HLS, and Vitis) would be an advantage. 

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