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Senior Staff System Design Engineer

159437
Hyderabad, India, India
May 5, 2021

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

  • B Tech/M Tech in EC/EE with at least 12-20 years of experience in the field of FPGA Design and Implementation  
  • Strong Digital fundamentals
  • Knowledge of Verilog, System Verilog
  • Hands on experience on Xilinx FPGAs and building designs out of Vivado, Timing analysis & closure
  • Tools – Vivado, Vitis/SDK
  • Exposure in scripting like Tcl, Python
  • System level understanding – Hardware and Software aspects of the system
  • Protocol knowledge – High speed serial protocols – preferably PCIe, CCIX/CXL, AXI, Coherency protocols – CHI/ACE
  • MUST HAVE: Working experience on PCIe based systems, architectures, protocol and specification understanding
  • Enthusiasm and adaptability to learn new protocols and complex architectures
  • Good debugging and problem solving skills

B Tech/M Tech in EC/EE with at least 12-20 years of experience in the field of FPGA Design and Implementation  

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