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Xilinx is looking for a Product Development Engineer to drive & shape up next generation architecture & design enabling advanced ACAP products achieve industry’s leading performance & reliability for multiple market segments & applications. The position provides a rich learning environment that is highly cross-functional with architecture, design, process technology, test, reliability, and manufacturing and provides for unique leadership opportunities. The position is within the Global Operations Pathfinding & Program Management Group based in San Jose, CA
- Actively participate & lead cross-functional teams across architecture, IP design, product validation, NPI & test teams to drive DFx for quality, performance, cost, Test, manufacturing & reliability
- Define and drive technical requirements, metrics & methodology for structural & functional test, silicon debug, binning & characterization, defect tolerance & yield enhancement
- Work with design verification teams to ensure DFT implementation & verification
- Drive execution of enhanced DFX (DFT/Design-For-Debug) methodologies with increased focus on debug support, failure diagnosis
- Work with designers on physical, power and logical issues impacting DFT, test infrastructure
- Plan infrastructure needs for product development roadmaps & schedule management
- Organize & track project issue list, requirements, meeting minutes via conventional (Excel, Power-point etc.), or specific project management tools (JIRA, Microsoft Project etc.) & effectively communicate the rationale for assigned actions to stakeholders & drive for closure
- Generate technical reports & present project progress during periodic engineering reviews
- BS, MS in EE/physics with 9+ yrs. of experience in product and test engineering preferably in various product market areas such as HPC, data center, emulation, automotive & telecom
- The ideal candidate should have experienced a complete ASIC product life cycle from initial architecture definition, design, verification, packaging, silicon fabrication, test & DFT, Wafer Sort, Final/Package test, characterization burn-in/reliability, yield and diagnosis.
- Experience in various aspects of DFT - SCAN, ATPG, BSCAN, MBIST
- Experience with mixed-signal BIST in particular for SERDES, ADC/DACs
- Experience in silicon debug and diagnostics methodologies and tools
- Working knowledge of ATE, test hardware, product validation, test data management, analysis, yield improvement
- Knowledge of FEOL/BEOL silicon fabrication process, package design and development, IC assembly & product QRA
- Experience leading cross-functional teams with the ability to influence key partners with fact-based approach. Must be a team player
- Willingness to work as an individual and as part of a team to deliver a product which is debug and test friendly starting from spec creation, design, verification, and finally to productization