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RTL CAD Engineer
Primary Location: United States-California-San Jose
Xilinx is looking for a RTL CAD Engineer in the IC CAD Team for the Central Poducts Group to support the frontend design teams.
· Implement and support flows that design teams use to run RTL tools (Lec, Lint, CDC, RDC, etc.).
· Become a frontend domain expert within the CAD team.
· Contribute in the execution and development of RTL methodologies
· Work directly with EDA vendors to address tools issues. Debug vendor tool problems and interact with designers to solve problems.
· Expertise in Formality and/or Conformal is desired.
· Expertise in linting, clock domain crossing is desired.
· Experience in formal verification tools and debugging methods
· Knowledgeable in RTL design using Verilog (SystemVerilog a plus)
· Perl, C or Tcl script writing.
· Strong debugging skills. Ability to solve problems to the root cause and recommend fixes.
· Good verbal and written communication skills with the ability to work with team members across multiple sites.
· BS/MS Degree in Electrical Engineering or Computer Engineering.
Years of Experience
· At least 5+ years of experience.