verification team is seeking a DFT engineer to join exciting career on Scan,
MBIST, iJTAG test development of latest 7nm MPSoC (Multi Processor System on
Chip) products and beyond. The IPs range from ARM based Processor to critical
IPs which provide automotive, data centre, machine learning and high-speed
communication solutions. You will work closely with designers to make sure DFT
structures are correctly inserted, with test engineers to make sure ATE test
programs can be generated from the DFT (ATPG, MBIST) tools, with product
engineers to make sure scan/mbist production test can run seamlessly and
stable, and with yield engineers to debug and root-cause failures/defects. You
will also be creating RTL design utilizing FPGA fabric resources to build
communication logic for stimulus and response delivery between device and ATE.
include but are not limited to:
closely with design team and make sure DFT structures are correctly inserted.
for developing, implementing and verifying DFT schemes on hard-IPs in FPGAs.
for developing and implementing techniques to test digital logic, using Scan
Compression, Stuck-at, Transition and Path-Delay fault models
for testing other parts of the design, including memory, mixed-signal, I/Os,
custom LBISTs & MBISTs, 1149.1 JTAG and IJTAG
to develop Firmware driven cost-effective test strategies/methodologies with
built-in diagnosis capability to enable efficient debugging and fault isolation
closely with the New Product Introduction and Test/Product teams to ensure
timely delivery of robust test patterns, and manage debugging of pattern issues
on bench/ATE to root cause the problem
Diagnosis and Yield enhancement through product lifecycle
At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.
Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and enhance people's lives.
If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.
• BS or MS in Electrical/Electronic/Computer Engineering
• 3-7 years of experience as DFT engineer
• Experience in creating and implementing complex chip-level DFT architecture
• Experience in DFT implementation including Scan and Scan Compression at IP and SoC level
• Experience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression.
• Knowledge of MBIST is a plus.
• Proficient in logic design using Verilog and experience in synthesis and STA
• Experience in developing test benches and simulation in RTL/GATE/SDF environments
• Knowledge of FPGA synthesis and design flow is a plus
• Experience with post-silicon debug and bench equipment (e.g., oscilloscope and logic analyser)
• Good communication skills, works well in a group environment that spans across continents
• Comfortable in Linux environment and writing/using scripting languages such as Perl, Tcl, etc