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Senior Design Engineer

158375
Hsin Chu, Taiwan, Taiwan
Aug 17, 2020

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Job Description

Description

The candidate will be part of a dynamic design team that is responsible for driving package design integration, verification and characterization in advanced FPGA systems, incorporating silicon/TSV, package stack-up/routing/PDN, discrete decoupling capacitors and system board interfaces. You will utilize the knowledge of physical design and skillset in programmable language to drive the package design automation planning and execution in every aspect of package design from layout, DFM, pin out to electrical verifications. While working as a member of a cross functional team, the candidate must communicate to silicon design, package, board design and CAD teams to accomplish joint-development goals in die-package-PCB co-design for product quality and efficiency enhancement.

Education Requirements

Years of Experience


BSEE. 1 year of experience in silicon/package physical design is a plus.


- Deep knowledge of Package and PCB physical design. Experience of Cadence Allegro, APD/SiP tool


- Electrical knowledge to packages and board design is a plus


- SKILL programming language. Scripting languages such as Perl, Python, Tcl and Visual Basic


- Working experience with Excel spread sheet Macro and Visual Basic


- Exposure to CAD flow development and design automations


- Strong English language communication skills




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