DescriptionAt Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.
Seeking a talented, self-driven and motivated engineer to join its design development team in Hyderabad. The candidate will be responsible for soft IP/Kernel development work. We are looking for smart, creative people who have a passion for solving complex problems.
The ideal candidate should have strong background in Verilog RTL Development & Xilinx frameworks with very good understanding in Perl, Shell, TCL scripting on linux platform and strong modular coding practices. The candidate should have a solid understanding of SW quality and processes.
· BS or MS in EE with 2+ years of IP/RTL development experience
· Strong background in Verilog RTL for IP development with working expertise on AXI4 Bus Protocol Perl
· Working knowledge of Xilinx EDA tools like Vivado/HLS/SDaccel
· Proficiency in scripting using Shell/TCL & Python on linux platform
· Excellent problem solving skills and willingness to think out of the box
· Experience with production software quality assurance practices, methodologies and procedures
· Excellent communication skills and experience working with global teams
Preferred: Exposure to any of these areas:
· Exposure to FPGAs and FPGA software tool chain.
· RTL/HLS Kernel Implementation & Verification flow.
· Familiarity with System Verilog, VHDL.
This is a contract position with atleast 12 months of commitment towards Xilinx