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This position is for a Techinal Leader to lead and develop key Silicon Validation IP and System Designs for Next Generation Xilinx Products
The is a key role in the Silicon Validation team at Xilinx. In this role the candidate will define and implement a sub-system and System level validation plan, create IP require to drive that plan and develop an overall platform for executing the plan. These IP will be released and needs to be developed so as to ensure seamless design of end users. He / she must lead any embedded software development required to drive these IP.
One of the core responsibility is to work with verification and other silicon validation and manufacturing groups to build a comprehensive and consolidated validation strategy and execute on that. Take ownership of the larger pre-and-post silicon validation effort for math engine and help drive this across Silicon Engineering, System Software and Application Engineering teams. Triage design issues on hardware, together with design, verification and validation teams.
In the longer term the candidate will develop some key IP blocks to enable both Silicon Validation and customer usage of the various new IPs that are part of Xilinx product portfolio for the coming generations.
B.Tech Electrical /Computer Engineering
Years of Experience
12+ years of experience