UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Senior Design Engineer

158008
San Jose, CA, United States
Nov 1, 2019

Share:

Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.


Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world’s first 5G networks, we empower the world’s builders and visionaries whose ideas solve every day problems and enhance people’s lives.


If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters – world class technology that improves the way we live and work. We are ONEXILINX.

Job Description:

  • This candidate will be responsible for different design stages in the RTL to GDS implementation.
  • This candidate will design, implementation RTL for complex digital and analog blocks using Verilog/System Verilog.
  • This candidate will be responsible for physical design flows (synthesis with DFT, place and route) and work on Static Timing Analysis.
  • This candidate will work closely with Functional Verification teams to support block level verification (constrained-random and/or directed verification environments using System Verilog and UVM).
  • This candidate is expected to have strong scripting skills in Perl, Tcl, Shell and/or other languages to support existing & develop new design automation tools/flows for the varied aspects of the design implementation.
  • This candidate is expected to work with various design groups across different disciplines in different geographical locations.
  • This candidate is expected to have regular communication with project teams worldwide to resolve issues and ensure targeted goals.

 Requirements/Education:

  • BS with 5+ years of experience or MS with 3+ year of experience in Electrical Engineering, Computer Engineering or related equivalent.
  • RTL design implementation of Digital/Analog blocks using Verilog/System Verilog.
  • Knowledge in VLSI design, Design Automation, IC design.Basic knowledge of EDA Tools (like Synopsys DC Compiler, Primetime, VCS, Cadence Virtuoso).
  • Knowledge of Physical Design (floor planning, synthesis, place & route) and Static Timing Analysis is preferred.
  • Experience with UVM/OVM and/or Verilog, System Verilog test benches, BFMs and usage of simulation tools/debug environments is preferred.
  • Basic understanding of FPGA architecture and customer usage model is a plus.
  • Knowledge of Cadence SPICE, IC compiler is a plus.
  • Experience with Silicon debug/validation at the tested and board level is a plus.Proficiency in Perl, Tcl, Shell, Python and/or other scripting language.
  • Experience creating internal and/or customer facing detailed documentation.
  • Excellent written and verbal communication skills in English.
  • Self-motivated team worker with ability to work in a fast-paced work environment

 

Share:

Similar Jobs

Technical Marketing Engineer - Entry Level

San Jose, CA, United States

Front-End AEM Web Developer

San Jose, CA, United States

Senior RTL/Logic Design Engineer

San Jose, CA, United States

Firmware Engineer

San Jose, CA, United States

Staff Financial Analyst, R&D

San Jose, CA, United States

Senior RTL Design Engineer

San Jose, CA, United States

Buyer, Strategic Sourcing & M&A

San Jose, CA, United States

Senior Design Engineer

San Jose, CA, United States

Senior Software Engineer

San Jose, CA, United States

Technical Program Manager, Software

San Jose, CA, United States

Contract Manufacturing Management

San Jose, CA, United States

EDA (Place & Route) Engineer

San Jose, CA, United States

Senior Pricing & Quoting Analyst

San Jose, CA, United States

Staff SoC Verification Engineer - PCIe

San Jose, CA, United States

SIPI Engineer Intern

San Jose, CA, United States

Campaigns Marketing Manager

San Jose, CA, United States

Information Security Analyst

San Jose, CA, United States

Patent Counsel

San Jose, CA, United States

Principal SoC Architect

San Jose, CA, United States

CAD Project / Procurement Engineer

San Jose, CA, United States

NPI Board Engineer

San Jose, CA, United States

Senior Characterization Engineer

San Jose, CA, United States

Staff Strategic Applications Engineer

San Jose, CA, United States