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Xilinx University Program Intern

Saggart, Ireland, Ireland
Sep 25, 2019


Job Description


At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and enhance people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.


The role:

The Xilinx University Program (XUP), part of the office of the CTO, is seeking an intern with experience developing FPGA-based hardware and embedded software applications with Xilinx development tools to work in our group located in Dublin, Ireland for a period of up to 9 months.  This is an exciting position working on the latest FPGA hardware and software technologies from Xilinx, including the Zynq System-on-Chip and Zynq Ultrascale+ MPSOC, Vivado Design Suite, SDSoC Development Environment, PYNQ framework, Alveo and AWS F1 instances using SDAccel Development Environment. 


• Create and update XUP training materials, including labs, demos and application notes
• Provide technical support to XUP events, including workshops and hackathons
• Provide technical support and manage online forums
• Provide technical support to key professors; identify and disseminate examples of best practice in teaching and research

• Support XUP administrative functions



Good knowledge of digital circuit design (VHDL/Verilog/HLS)

Familiarity with Xilinx FPGA, Zynq and system design tools

Good knowledge of C/C++ programming and other high-level languages (e.g. Python)
Excellent communication, teamwork & problem solving skills

Education Requirements

Masters/Bachelors or equivalent in Electrical/Electronic/Computer Science or related field


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