Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Our global team is growing, and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!
Xilinx Labs, part of the CTO Office at Xilinx, is concerned with innovation, differentiation, and the de-risking of technology. Goals are to: enable new users; provide a ‘more than Moore’ roadmap; seed new market opportunities; and win the mindshare of startup and research communities. Xilinx Labs has established a new group at the Xilinx Asia-Pacific headquarters in Singapore, to complement its existing groups at the Xilinx headquarters in North America and in Europe
The research intern will participate in blockchain related projects that span research and development in the areas of hardware, software and applications. The technical focus will be on network-attached or PCIe-attached acceleration of compute and storage bottlenecks in blockchain platforms such as Hyperledger Fabric. Candidates with strong experience in FPGA based RTL design, FPGA based acceleration of cloud applications, and hardware/software co-design should apply. The research intern will gain experience in FPGA based accelerator design and interfacing with software applications.
Master or Ph.D. student in Computer Engineering, Computer Science, or Electrical Engineering.
Strong Hands-on coding skills in C/C++ or Verilog.