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As part of the Data Center IP Group you will:
- Own the microarchitecture and implementation of complex blocks to meet functional, performance, timing, area, and power requirements
- Work with the Verification team to ensure the design is properly tested and covered.
- Support FPGA and silicon bring-up of features.
- Operate across groups to set expectations and achieve smooth integration of deliverables.
- Document design features, requirement, and operation.
- BSEE or equivalent plus at least 4 years of relevant experience.
- Experience in designing, validating and characterizing of complex IP.
- Experience with Verilog required.
- Ability to quickly analyze and debug RTL issues.
- Excellent oral and written communications skills.
- Knowledge in NIC and/or DMA a plus.
- Knowledge of PCIe, AXI, and networking protocols a plus.
- Experience with FPGA designs a plus