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Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and enhance people's lives.
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The job is in the hardware platform group of Xilinx. The key role is central to the definition, development and productization of board level solution architectures built around Xilinx ACAP IP and system software.
Scope of work:
-Work with product planning and product marketing in defining the ACAP solution features and feasibility on the evaluation boards
-Work with silicon and IP team in defining the validation enablement for all IP blocks of the ACAP product portfolio
-Work with board engineering team in ensuring successful implementation of system architecture, solution features and test capability on the hardware platform
-Work with system software and Vivado tool team in planning system controller hardware, operation systems, software drivers and tool features for the on-time board bring-up, debug and validations
-Work with sales and marketing teams in engaging with key customer accounts
This role will own the board level product architecture specification
-Wide understanding of hardware and software architecture for HPC, AIE, machine learning, NIC implementation, memory, RFSoC and high speed serdes
-Strong understanding to drive Silicon ACAP architecture to fulfil the target performance of the next generation of hardware platform
-Defining the architecture and design topology of eval board to have a successful enablement and wide acceptance in different system level
-Establishing architecture metric of the performances vs cost
-Developing roadmap to link Si and Packaging roadmap with next generations of customer hardware platform
- BS with12+ years of exp or MS with 8+ years of exp or PhD with 5+ years of exp in Electrical Engineering, Computer Science or related equivalent
- Must have relevant software and solution experience in the design, development and productization of board level products in the wired/wireless, datacenter, and HPC industry
- Must have experience in technical leadership and mentoring of design teams