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Design Engineer 2

Hsin Chu, Taiwan, Taiwan
Sep 15, 2019


Job Description




The candidate will be part of a dynamic design team that is responsible for driving package design integration, verification and characterization in advanced FPGA systems, incorporating silicon/TSV, package stack-up/routing/PDN, discrete decoupling capacitors and system board interfaces. You will utilize the knowledge of physical design and skillset in programmable language to drive the package design automation planning and execution in every aspect of package design from layout, DFM, pin out to electrical verifications. While working as a member of a cross functional team, the candidate must communicate to silicon design, package, board design and CAD teams to accomplish joint-development goals in die-package-PCB co-design for product quality and efficiency enhancement.                      




Job Requirements


BSEE and 3 years, or, MSEE and 1 years of experience in silicon/package/board physical design.


Deep knowledge of Package and PCB physical design. Experience of Cadence Allegro, APD/SiP tool


SKILL programming language. Scripting languages such as Perl, Python, Tcl and Visual Basic


Working experience with Excel spreadsheet, Macro and Visual Basic


Exposure to CAD flow development and design automations


Electrical knowledge to packages and board design isr a plus

strong communication skill


BSEE and 3 years, or, MSEE and 1 years of experience in silicon/package/board physical design.


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