DescriptionAt Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.
Xilinx is looking for a developer with expertise in modeling power consumption of complex HW architectures.
As part of the Device Power Modeling team, the candidate will be responsible for the definition, development, validation and release of power models and modeling tools for all of Xilinx’s All Programmable FPGAs, SoCs, 3D ICs and ACAP devices. Xilinx’s new hardware programmable SoC FPGAs and Adaptive Compute Acceleration Platform (ACAP) deliver most dynamic processor technology and are achieving record performances in Data Center, Wireless/5G, Automotive/ADAS and Emulation applications. These new applications and heterogeneous computing architecture brings in new challenges in power modeling, especially early power estimation of large scale user designs that solve complex acceleration or AI/ML problems.
The position requires strong programming fundamentals preferably in C++ and good understanding of power aspects of analog, digital and mixed signal circuits.
• Masters in EE/CE/CS with 5 years or PhD with 3 years of relevant experience.
• Experience in EDA product development
• Experience with software development - preferably in C++
Nice to have
• Perl, TCL, Python scripting, complex Excel spreadsheet development and Excel VBA development experience
• Cross-functional team work experience (SW/HW/Package/Thermal/Production)