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Mixed-signal IP and SoC System Test Lead Engineer

157466
Singapore, Singapore, Singapore
Jun 24, 2019

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Job Description

Description

The product verification team is seeking a Senior Mixed-signal/RTL/embedded engineer to join exciting career on functional test development of latest 7nm MPSoC (Multi Processor System on Chip) products and beyond. Strong knowledge of high-speed mixed-signal logic, Verilog RTL and C embedded programming is required. You will work on complex SoC design with multiple mixed-signal IPs, advanced ARM/Microblaze processors, high-speed communication interfaces, DDR memory, programmable logic FPGA and more. Your main responsibility is to lead a team of engineers to develop functional manufacturing tests of high-speed critical components in the SoCs. Both HW and embedded SW skills will be used to debug complex system. Knowledge of serial protocol (SATA, PCI Express, Interlaken, Ethernet, USB, etc.), DDR4/DDR3 memory protocol, calibrations and trainings are desirable.

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and enhance people's lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

• MS or Ph.D. in Electrical/Electronic/Computer Engineering
• 5-10 years of experience in RTL design and/or HW functional verification
• Solid understanding of digital/mixed-signal design, static timing analysis and timing closure techniques
• Fluency in writing synthesizable RTL; Verilog and SystemVerilog
• Experience with post-silicon debug and bench equipment (e.g., oscilloscope and logic analyser)
• Strong technical ability to lead a team of five engineers with the focus on high-speed mixed-signal IPs and SoC System-level tests
• Knowledgeable in high speed serial protocols (SATA, PCI Express, Interlaken, Ethernet, USB, etc.) is strongly desirable
• Experience with High Speed Giga Bit Transceivers (GT) is highly desirable.
• Knowledgeable in DDR4/DDR3 protocol, calibration and training is strongly desirable
• Strong knowledge of advanced processor and embedded C programming
• Good understanding of how HW and SW work together in SoC/embedded system
• Experience with FPGA design flow and timing closure is strongly desirable
• Experience in using simulation/emulation environments for pre-silicon validation is desired
• Good communication skills, works well in a group environment that spans across continents
• Comfortable in Linux environment and writing/using scripting languages such as Perl, Tcl, etc

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