The Design Software Verification team play a critical role in verifying the Xilinx EDA tool chain for both software acceleration and System on Chip (SoC) design.
In this role you will be responsible for understanding & evaluating software support for FPGA architecture features by creating test designs, ranging from small unit tests to full systems addressing customer markets. Your strong debug and digital design skills are needed to ensure our High Level Synthesis (HLS) optimisation and implementation meet customer needs with the highest quality.
This role requires strong software development skills, combined with excellent software testing skills, including the creativity needed to imagine the many ways in which our EDA software can be used, in order to find software flaws. You will need to learn fast as this role will require you to adapt your skills to changing technologies as Xilinx expands its EDA portfolio in the cloud and AI compute space.
· Responsible for the verification of Xilinx Acceleration Libraries including their use for the development of small C/C++/OpenCL applications targeting specific FPGA acceleration features to help identify flaws in the software tools or libraries.
· Responsible for design and implementation of larger system class applications targeting specific market segments (e.g. image processing/database/financial) using Xilinx Acceleration Libraries to help identify limitation in the libraries or tools.
As part of your role you will gain these skills:
· Strong C, C++ or OpenCL development experience
· Deep knowledge of using software & hardware debug tools (e.g. gdb, Vivado Labtools)
· A good understanding of digital logic design principles.
· Excellent organization, teamwork, communication and interpersonal skills.
· Superior analytical and problem-solving skills and a high motivation to learn.
· Knowledge of scripting languages like Perl, Python or TCL is an advantage
· HLS, FPGA, Embedded SoC or GPU design experience is a distinct advantage
· Deep understanding of OpenCV, SQL, BLAS or QuantLib functions is desirable.
· Honours Bachelors/ Masters in Electronics/Electrical/Computer Engineering