Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team.
Xilinx is looking for a talented individual to join the Ethernet and Interlaken Solutions Group (EISG) in the position of Staff Design Engineer. The successful candidate will join our design verification team developing ASIC and FPGA-based intellectual property (IP) to address the needs of state-of-the-art wired communications systems.
It is expected that the candidate will be an expert in Verilog coding and have in-depth knowledge or advanced verification methodologies such as constraint-random or UVM. Working knowledge of RTL design and processes would be an asset, as would experience with scripting languages such as Perl and TCL. It would also be desirable for applicants to have experience with wired communications protocols..
The successful candidate will have demonstrated their technical skill through extensive experience delivering ASIC and/or FPGA solutions to the market, and leverage this experience to architect innovative, high quality verification testbenches for complex IP products.
In addition to strong technical abilities, the position requires excellent written and verbal communication skills that will be utilized for multi-location collaboration, and developing verification specifications and test plans. A desire to mentor and coach junior engineers would be a plus.
We are building the next generation Internet. Xilinx already holds a leading position in the wired infrastructure manufacturing industry and is technologically well positioned to drive the ‘programmable imperative’ into all areas of advanced networking systems. This job opening presents an opportunity to work with a highly motivated team, best-in-class configurable silicon and software and industry leading wired communications technologies.
- BSEE minimum required.
- +10 years experience in ASIC/FPGA verification
- Extensive experience in designing and implementing testbenches, coverage closure techniques and regression management flows
- In-depth knowledge of modern verification practices including System Verilog, UVM and assertion based test
- Experience and knowledge of communications standards (such as Ethernet, OTN, Interlaken)
- Excellent written and verbal communication skills.
- Experience verifying digital communication systems (examples would include Ethernet, optical communications, and packet processing applications)
- Experience with Xilinx tools and flow