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Staff Product Engineer - Vivado and AI Engine Compilation Flow

157213
San Jose, CA, United States
Jul 12, 2019

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology.  We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice.  From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world’s first 5G networks, we empower the world’s builders and visionaries whose ideas solve every day problems and enhance people’s lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you!  At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters – world class technology that improves the way we live and work.  We are ONEXILINX. 

The Product Engineer position is in the Software and Acceleration Products group, located in San Jose (California) or Longmont (Colorado). The successful candidate will focus on the AI engines part of Versal ACAP tools roadmap definition, feature specification, validation, documentation, tutorials and train-the-trainer material. The candidate will work in a highly cross-functional R&D environment, interacting with HW and SW engineering teams, internal acceleration application teams and tier-1&2 customers to enable high performance machine learning (CNN/DNN), DSP processing (Wireless 5G) and vector-based designs, with good Ease-of-Use and solid methodologies.
 
Responsibilities:
  • Drive successful adoption of Xilinx AI Engine tool flows by working closely with key customers, Xilinx Marketing and field specialists
  • Drive updated design methodologies around the AI Engines usage, based on industry's best practice and existing Xilinx methodologies
  • Triage tools, flows and methodology issues to refine compilation tools features for each release and provide short term solutions to keep users and customers on track with their projects

Common activities:
  • Explore software and hardware compilation algorithms, memory architecture and function mapping to Versal ACAP devices to optimize metrics such as throughput, latency, performance per watt.
  • Work closely with design and compilation teams to create micro-architecture specifications along with special tool support to gradually improve market specific applications.
  • Deep-dive on new and critical tool issues seen by customers to identify work arounds. Triaging reported issues in the implementation for tool enhancements.
  • Actively explore innovative methodologies and design practices with emphasis on high level design languages (C/C++) and their impact on tool chain flow from design entry to generating boot image.
  • Tracking product development schedules and issues, and validating the readiness of new or enhanced features in any new Vivado release.
  • Develop and deliver training materials on new features and methodologies.
  • Authoring high quality documentation tuned to the needs of the reader for their areas of expertise.
  • Staying current with industry trends, algorithms, and practices.

 

Education Requirements: 
M.S. in Electrical Engineering, Computer Science, Computer Engineering (or a closely related field of study) with minimum 3 years of relevant experience.

Job Requirements:
Product Knowledge:
  • 2+ years hands on experience of CPU, GPU or VLIW architectures, programming models and tool flows
  • Strong knowledge of C/C++ for high performance computing, debugging and methodology
  • Proficient in Python, basic knowledge of Tcl and Perl
  • Experience with HW pipeline and micro-architecture design of machine learning algorithms is a plus
  • Experience in FPGA design flow, RTL design or HLS-based design is a plus
  • Experience with deep learning frameworks (Tensorflow, Keras, PyTorch, Caffe, CNTF) is a plus
Design Enablement:
  • Has good understanding of software-vs-hardware trade-offs to help users adopting best practice and achieving high quality results
Customer Focus:
  • Can resolve customer escalations professionally in a quick and effective manner
Problem Solving:
  • Ability to handle and solve complex system level issues
Technical Communication:
  • Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear
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