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Principal Engineer (SUPV)

157116
Hyderabad, India, India
Jun 14, 2019

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

 

In 2018 Xilinx announced a new class of computing technology called ‘Versal’. One of the innovations in this device is the integration of a multi-core array of VLIW signal processors that are programmed in C/C++. These processors are called ‘AI Engines’.
Xilinx is seeking an software development architect to join our R&D team developing machine learning technology on the Versal platform. This is an opportunity to be on the ground-floor of the development of new hardware and software technology for machine learning and artificial intelligence applications. You will be working with state-of-the-art machine learning algorithms and architecting the realization of these algorithms on the Versal platform. 
Hands-on experience with multicore processor programming and  C/C++ code optimization for VLIW DSP processors is a core requirement for this position.  A strong knowledge of converting floating-point algorithms to fixed-point arithmetic is also critical.
Hands-on experience with FPGA design flows, FPGA architecture, system design, system integration, DDR memory interfaces and realizing high-performance FPGA-optimized designs and verification methodologies are also  critical for the  position.

Education level – advanced degree
10 years of industrial experience
Skills – the candidate would have skills in several, but not necessarily all, of the following
  • C/C++ programming
  • Matlab
  • Signal processing algorithms
  • Hands-on experience with high-performance DSP processors
  • Partitioning problems for execution on a multicore processor
  • FPGA design flow
  • Verilog and/or VHDL
  • Verification methodologies
  • Simulation
  • Parallel computing
  • Scripting languages such as python
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