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Memory Design and Architecture Engineer

157066
San Jose, CA, United States
Jun 21, 2019

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology.  We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible. 

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice.  From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world’s first 5G networks, we empower the world’s builders and visionaries whose ideas solve every day problems and enhance people’s lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you!  At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters – world class technology that improves the way we live and work.  We are ONEXILINX.

Responsibilities

  • Design and implementation of Dram Memory controllers
  • Micro-architecture and RTL implementation
  • Work closely with Verification and Validation team
  • Work with Physical design for timing constraints, timing closure and Physical implementation 

Job Requirements

  • Work experience with DDR SDRAM Memory System: DDR4/DDR5, LPDDR4/5
  • Experience in Verilog, System Verilog, LINTing, CDC, Power
  • Fundamental understanding of high speed digital design and mixed signal interfaces
  • Knowledge of DFX is a plus
  • Knowledge of C++, python, perl is a plus
  • Excellent analytical and debug skills
  • Excellent written and oral communication skill

Education Requirements 

      

  • Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering 

Years of Experience

  • 8+ years of relevant design experience


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