Xilinx is looking for a developer with expertise in modeling complex HW architectures for fast simulation in Verilog, VHDL and SystemC.
As part of the Device Simulation Modeling team, the candidate will be responsible for the definition, development, validation and release of Verilog, VHDL, SystemVerilog or SystemC simulation models for all of Xilinx’s All Programmable FPGAs, SoCs, 3D ICs and ACAP devices. Xilinx’s new hardware programmable SoC FPGAs and Adaptive Compute Acceleration Platform (ACAP) deliver most dynamic processor technology and are achieving record performances in Data Center, Wireless/5G, Automotive/ADAS and Emulation applications. These new applications and heterogeneous computing architecture brings in new challenges in simulation modeling, especially in fast simulation of large scale user designs that solve complex acceleration or AI/ML problems.
The position requires strong programming fundamentals preferably in C++ and good understanding of System On Chip (SoC) hardware architecture.