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Serdes PHY Design Intern

156330
San Jose, CA, United States
Jun 20, 2019

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Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? At Xilinx, we hire and develop leaders and innovators who want to revolutionize the world of technology.  We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.

Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice.  From the start, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world’s first 5G networks, we empower the world’s builders and visionaries whose ideas solve every day problems and enhance people’s lives.

If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you!  At Xilinx we care deeply about creating meaningful development experiences while building a strong sense of belonging and connection. We foster an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters – world class technology that improves the way we live and work.  We are ONEXILINX.

 

Xilinx Serdes Technology Group develops high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS process. We are currently seeking an analog/mixed-signal design intern to join our world-class team.

 

The candidate will be responsible for one of the following tasks:

  • Design of a high-speed ADC-based receiver or DAC-based transmitter for a PAM4 electrical and optical links
  • Design of high-speed optical modulator driver and/or optical receiver (e.g. TIA)
  • Design of high-performance, large-tuning-range Digital PLL for high-speed transceivers
  • Explore new tools/flows/methodologies that significantly improve analog/mixed-signal circuit/layout design time

 

This position is open for Ph.D students interested in pursuing career in analog/mixed signal circuit design. The candidates must have taken a graduate-level circuit design classes covering analog/digital circuit design and data-converters. Hands-on experience using circuit simulators as part of a class design project and project/lab-work experience in high-speed circuit design and high-speed data converters are a plus.


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