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Senior Applications / Design Engineer - SerDes

156256
San Jose, CA, United States
Nov 28, 2018

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

 

As a SerDes Applications team member, you will use your knowledge of high-speed SerDes technology to develop reference design, create protocol specific use models, and deliver application notes for Xilinx transceivers.
Responsibilities include:
  • FPGA design, software and firmware development for various transceiver applications
  • Work with internal IP teams and customers to ensure proper usage of Xilinx transceivers for various applications
  • Development of SerDes collateral such as user guides, data sheets and application notes
  • Perform SerDes electrical compliance or debug; examples: PCIe, OIF, and 802.3

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Qualifications:
  • BS in EE, CE or related fields with 3+ years of work experience or MS with 1+ year of work experience
  • Strong knowledge of RTL design in Verilog/VHDL, and FPGA design
  • Knowledge of different transceiver building blocks
  • Experience in Python and C/C++ for embedded system development
  • Hands-on experience with high-bandwidth oscilloscopes, BERTs and associated lab equipment
  • Excellent verbal and written communication skills
     
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