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Senior Design Verification Engineer – DSP/CPU

156223
San Jose, CA, United States
Mar 21, 2019

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team

 

Xilinx HSPD Verification group is looking for a Senior Verification Engineer for verification of next generation DSP/CPU processors.

 

The individual will help design, develop and use simulation and verification environments, at block and full chip FPGA level, to prove the functional correctness of CPU/DSP processor. Candidate is expected to be a strong team player with good communication skills and the motivation to excel.


Will be working with a team of design and verification engineers and play an important role in the verification of a next generation DSP/CPU architecture in Silicon

Work with Architecture, design and software teams to create block and subsystem level verification testplans and develop testcases for verifying next generation multi-core DSP processors

Create testbenches, testplans and testcases starting from the architecture/ implementation specification, and work with architecture, design, verification and software teams to ensure micro-architecture and design is fully verified/validated across multiple platforms

Debug failures in simulation / emulation of the design on multiple platforms and assist in identifying / obtaining and verifying design changes


Education and Years Experience Requirements
Requires BS w/ 5+ yrs or MS 3+ yrs or PhD in Electrical Engineering, Computer Engineering, Computer Science or related equivalent.

  • Experience in the area of processor / SoC verification.
  • Experience in verification of one or more of the following: multi-core processors including SIMD, Vector processors, floating point, etc. is a plus.
  • Experience in SoC verification a plus
  • Ability to debug failures in RTL and environment on different verification platforms
  • Strong analytical problem solving, and attention to details 
  • Strong experience HDL, verification, and general computational logic design/verification concepts
  • Expertise in Verilog/System Verilog, C/C++/SystemC, UVM, Scripting languages like Perl/Python, etc
  • Requires good OOP programming skills in languages such as C++, Python, Java 
  • Excellent written and verbal communication skills
  • Excellent interpersonal skills, self-motivated
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