Looking for senior EDA developers who would enable evolution of Xilinx's next generation FPGA devices.
As a part of Architecture team, the candidate needs to contribute to different aspects of Architecture evaluation that includes:
This is a research-based organization and our work includes but does not limit to above job description. The team is focused at finding limits of proposed next generation FPGA architecture and overcoming them by suggesting improvements in architecture.
Primary Skills : C /C++ , algorithm, data-structures, python
Familiarity with : FPGA /ASIC design flow, timing / power analysis, synthesis, placement, routing, SAT, ILP etc
Education Requirements Bachelors in EE/ECE/CS with minimum 7 years of experience or Masters with 5 years of experience