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IC Design Engineer

156148
Singapore, Singapore, Singapore
Nov 7, 2018

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

 

Detailed Description

• Implement design using the latest technology 7nm node process to achieve high performance design at 112Gbps.

• Develop and implement plans to synthesize and close timing on complex digital integrated circuits at the block, subsystem or device level (100K to 10M+ gates) which are coded in VHDL/Verilog.

• Design complex clock structure to meet tight skew requirements

• Simulate and analyse log and report generated from EDA tools and make design trade-off to get the required results within the scheduled milestones.

• Work with various design groups across different disciplines (Logic, Circuits, DFT & Layout) to meet timing closure, area, power, and performance requirements.

• Ensure the implemented design meets all DRC required for process node below 20nm as well as DFM.

• Communicate regularly with the project teams world-wide to resolve issues and to ensure meeting targeted goals and schedule.

 

 
 


Requirements

• Bachelor/Masters Degree in Electrical/Computer Engineering

• Strong scripting skills in Perl, TCL and Shell, particularly in synthesis & timing algorithms, with good understanding of UNIX/LINUX.

• Able to work autonomously as well as in a team environment across multiple geographical sites, with a strong desire to succeed.

• Excellent debugging, problem solving and analytical skills.

• Excellent verbal and written communication skills. Strong interpersonal skills.

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