Xilinx Hyderabad is looking for a self-motivated C++ developer to work on an exciting new project which involves giving feedback to the user on timing closure. The ideal candidate has a deep background in timing closure in FPGA synthesis, placement or routing. We are looking for smart, creative people who have a passion for solving complex problems.
The ideal candidate has a strong background in algorithms, data structures and SW engineering, with strong foundations in C++, boost / STL and strong coding practices. The candidate should have a solid understanding of SW quality and processes.
Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!
BS or MS in CS, EE or CE with 3+ years of software development experience
Background in EDA tools development preferred
Strong background in computer algorithms and data structures.
Strong background in C++ programming, including familiarity with boost and STL
Excellent problem solving skills and willingness to think outside the box
Experience with production software quality assurance practices, methodologies and procedures
Excellent communication skills and experience working with global teams
Preferred: Exposure to any of these areas:
RTL Synthesis, datapath or high-level synthesis, technology mapping
Placement and/or routing algorithms
Static timing analysis
FPGAs and the FPGA software tool chain
Verilog or VHDL
Scripting languages such as Perl or Python
Machine learning, data analysis, pattern matching