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Senior DFT engineer

155984
Singapore, Singapore, Singapore
Oct 9, 2018

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI). 

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

 

Candidate has a challenging opportunity to join the verification team to work on state of art embedded SERDES technology in 7nm process, whose key responsibilities include but are not limited to:

  • Working closely with IC Design during pre-silicon verification (chip level verification) and post silicon validation
  • Developing high coverage functional BIST patterns, built in FPGA fabric, to test the embedded SERDES
  • Fault Grade and analyse functional BIST patterns to ensure highest quality.
  • Working with Product Engineer to address Yield, Design & Quality issues during New Product Introduction phase and also to address any post production issues
  • Building or contributing to a scalable pattern development methodology to efficiently test highly configurable embedded SERDES
  • Balancing Test Time with quality to meet product requirements
  • Defining DFT requirements for next generation SERDES to improve test coverage or time

Education Requirements 
  • Bachelor Degree in Electrical/Electronic Engineering


Job Requirements

  • 5 years of relevant experience working on design and functional verification
  • Fluency in writing synthesizable RTL
  • Familiar with Analog front end logic and/or high speed digital circuit
  • Experience with FPGA design flow and timing closure                    
  • Experience with High Speed Giga Bit Transceivers (GT) is highly desirable.
  • Experience with post-silicon debug is a plus
  • Good communication skills, works well in a group environment that spans across continent
  • Experience in Linux environment and writing/using scripting languages such as Perl, Tcl, etc

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