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Senior Software Engineer

155890
San Jose, CA, United States
Sep 12, 2018

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Job Description

Description

Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics. Among the broad range of end markets we serve are:

  • Aerospace/Defense
  • Automotive
  • Broadcast
  • Consumer
  • High Performance Computing
  • Industrial / Scientific / Medical (ISM)
  • Wired
  • Wireless

 

Design, develop, troubleshoot and debug software programs for enhancements and new products. Develop core software infra-structure for Xilinx applications. Solve challenging technical problems with robust algorithms and features.  Optimize code for high performance on large data sets and leverage leading edge industry standard technologies. Leverage EDA expertise to develop and maintain the core netlist and constraint infrastructure for Vivado Design Suite. Analyze the architecture and design of netlist/constraint infrastructure to support new FPGA devices. Apply software architecture skills to improve the runtime and memory footprint of the netlist/constraint infrastructure. Utilize EDA knowledge to ensure that the infrastructure supports Xilinx EDA tools like synthesis, placer and router. Enable runtime efficient import and export operations on the netlist/constraint database. Utilize strong analytical and troubleshooting skills along with the EDA flow knowledge to enhance and maintain the netlist/constraint infrastructure.


#LI-DNI

Education:
  • Master or foreign equivalent in Computer Engineering, Electrical Engineering or related field.
Experience:
  • 3 years experience as Software Engineer or related occupation.
Alternate Requirements:
  • Will also accept a Bachelor’s degree or foreign equivalent in Computer Engineering, Electrical Engineering or related field plus 5 years progressive experience in position or related occupation.
Special Requirements:
  • Must have at least 3 years of prior work experience in each of the following: 
    1. C++ programming
    2. FPGA EDA Flow
    3. Netlist and Constraint Infrastructures
    4. VHDL, Verilog, or EDIF Netlist Import and Export
    5. Scripting Languages including one of the following: TCL, Perl, or Python
#LI-DNI
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