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Staff Design Engineers (multiple positions)

155849
San Jose, CA, United States
Sep 3, 2018

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Job Description

Description

Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics. Among the broad range of end markets we serve are:

  • Aerospace/Defense
  • Automotive
  • Broadcast
  • Consumer
  • High Performance Computing
  • Industrial / Scientific / Medical (ISM)
  • Wired
  • Wireless

 

Define, design, verify, and document ASIC development. Determine architecture design, logic design, and system simulation. Work in a verification environment. Responsible for block level verification plans, test plans, and full chip test plans. Develop block level test bench and tests in UVM methodology including scoreboard. Work with designers to get the coverage closure and port block level tests to full chip test bench. Integrate VIPs as needed and work with software, validation and emulation teams as needed. Work on other aspects of verification like CDC, gate simulation, lab bring up and silicon validation.
 
#LI-DNI

Education:
  • Master or foreign equivalent in Electronics Engineering, Electrical Engineering, Computer Science, Computer Engineering, or related field.
Experience:
  • 6 years experience as Hardware Engineer, Design Engineer, Staff Engineer, Research Assistant, Trainee or related occupation. 
Alternate Requirements:
  • Bachelor’s degree or foreign equivalent in Electronics Engineering, Electrical Engineering, Computer Science, Computer Engineering, or related field plus 8 years progressive experience in position or related. 
Special Requirements:
  • Must have at least 1 year of prior work experience in the following:
    1. Architecting and developing self-checking constrained random verification environment using System Verilog
    2. UVM verification methodology
    3. Executing test plans, debugging failures, and writing functions.
    4. AMBA AXI, and APB Protocols

#LI-DNI

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