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Staff Emulation Engineer

155754
San Jose, CA, United States
Sep 6, 2018

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

We are seeking an individual interested in creating hardware validation platforms and debugging complex issues involving both hardware and software.

 

Our team develops hardware systems for pre-silicon and silicon validation of our advanced FPGA families.  We use both commercial emulation systems and FPGA-based platforms for prototyping.  On silicon, we develop boards to functionally validate the latest silicon features. 

Qualifications:

  • BS in Electrical or Computer Engineering and 9 plus years of experience or
  • MS in Electrical or Computer Engineering and 7 plus years of experience or
  • Experience with Emulation of full-SoC design with embedded processors such as ARM Cortex A9, A53
  • Experience building, running and debugging SoC system failures on emulation platforms (Zebu, Palladium or Veloce)
  • Have worked with the leading emulation vendors (Synopsys, Cadence, Mentor) to debug issues and deploy new capabilities
  • Broad software debug experience with C/C++ and knowledge of low-level assembly programming languages
  • Fluent in Verilog and a familiarity with VHDL hardware design languages, simulation and debug 
  • Working knowledge of Linux environment 
  • Experience with scripting languages including Perl, Python, Unix shells and Makefiles 
  • Experience with Synopsys Design Constraints (SDC)
  • Experience developing system or IP prototypes using FPGAs
  • Experience using FPGA synthesis tools, including Synopsys Synplify 
  • Experience using Xilinx Ultrascale, Vivado, and Vivado Debug

 An ideal candidate would also have some of:

  • Knowledge of high-speed interfaces including PCIe, USB, SATA, Ethernet, DDR3/4, LPDDR3/4.
  • Knowledge of devices including SPI, IIC, SD, NAND, QSPI.
  • Experience with FPGA-based validation designs based on embedded processors such as ARM Cortex A9, A53 and other hard IP within Xilinx FPGAs.

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