Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).
Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!
Characterization Issue Resolution / Customer Issue Support
Performance and Yield Analysis
- Takes full responsibility of validating any characterization or customer application issue with minimal guidance.
- Takes responsibility for isolating the issue to a specific area such as test gap, SW bug, silicon bug, or process deviation.
- Collaborates and works with necessary counter parts in Design, Test, or Applications to resolve any product performance related issue.
- Demonstrates an ability to analyse and present data in a clear and convincing way to highlight if an issue is present or resolved.
- Maintains a good understanding of how characterization measurement impacts FPGA speeds file and work with counter-parts in making speeds file adjustments.
Product Characterization Suite Development
- Ability to analyse FPGA block and feature performance independently. Take ownership of related datasheet parameter validation.
- Takes full responsibility of generating all the analysis plots for supporting the validation of certain FPGA feature performance.
- Builds basic statistical analysis skills and generate trends for the analysis of device feature performance over process windows.
- Takes full ownership of providing necessary guard band in both wafer sort and Final test to achieve the objective of shipping the highest quality products.
- Maintains a good understanding of the strengths and short comings for different platforms and methodologies so the appropriate trade-offs can be recommended if necessary
- Takes full block level responsibilities for generating the characterization, datasheet, and customer qualification reports.
- Possesses good understanding of how FPGA features are used and implemented by Xilinx SW tools in typical applications.
- Establishes block ownership for characterization in the V&C process. This includes the validation of silicon and the accuracy of related SW tools.
- Represent characterization in the cross functional team.
- Possesses good understanding of specific block operations and contribute to establishing the V&C checklist. Develop expertise in specific block applications and how it interacts with other FPGA features.
- Demonstrates fluency in the application of different characterization test methodologies to appropriate tests with minimal guidance.
- Takes full ownership of production binning and characterization tests. Responsible for the robustness and accuracy of released tests. Responsible for resolving any issues that arise in the characterization or production environment.
- Generates automation scripts where applicable for efficiency improvements.
- Bachelor/Master Degree in Electrical/Electronic Engineering, 3 or more years of experience
- Experience using Verilog, VHDL, simulation, synthesis, and timing closure
- Experience on IO characterization (Analog and Mixed Signal), and knowledge on various IOs standards (LPDDR, DDR, LVDS, MIPI, LVCMOS)
- RTL knowledge for content creation & debug, including logic and state machine implementation, and Vivado SW knowledge is a plus
- Unix proficiency and Perl or other scripting language is a plus
- ATE test program knowledge, preferably Advantest
- Bench equipment knowledge, e.g. signal generator, oscilloscope
- Strong data analysis skill as well as proficiency on data analysis tool e.g. JMP, Microsoft tools
- Strong communication skills including data presentation