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IC Design Engineer

154958
San Jose, CA, United States
Oct 10, 2018

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Job Description

Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!

 

We are looking for engineer to design custom and semi-custom digital integrated circuits blocks for Xilinx's next generation FPGAs on industry leading CMOS technologies. This individual will participate in architecture definition, block specification, and floor planning. Evaluate future product requirements for power, performance and area. Design custom and semi-custom circuits for area, performance and power. Perform analog and digital simulation, static timing analysis, and silicon and electrical rule verification.
 
Responsibilities:

  • Logical and physical optimization of custom digital circuits in a Digital Signal Processing (DSP) block. 
  • Implement and review physical design constraints for automated place and route design flows. 
  • Simulations to characterize performance and power at cell, critical path, and block-level designs. 
  • Run circuit-level checks for electrical characterization. 
  • Support for timing and power modeling based on hardware design. 
  • Support for post-silicon validation through functional simulation and pre-silicon benchmarking for performance and power.
 #jm

Qualifications:

  • Master’s Degree in Electrical Engineering
  • Knowledge in VLSI design, design automation, IC design
  • Knowledge of floor planning, synthesis, place & route and static timing analysis
  • Knowledge of ADDER multiplier, arithmetic circuits preferred
  • Knowledge of Cadence SPICE, IC compiler  preferred
  • DSP knowledge preferred
  • Self-motivated team worker, good verbal and written communication skills

 

 

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