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Sr Design Engineer 2

155158
Hyderabad, India, India
Jun 8, 2018

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Job Description

Description

Xilinx is the leading provider of All Programmable FPGAs, SoCs, MPSoCs and 3DICs. Xilinx's all-programmable devices are designed into tens of thousands of products that improve the quality of the everyday lives of billions of people worldwide. For over 30 years, Xilinx has been behind some of the greatest advancements in technology and science - from the industry's first fabless semiconductor model to the NASA Curiosity Mars Rover, to today's autonomous vehicles and hyperscale data centers. Xilinx uniquely enables applications that are both software-defined, yet hardware optimized - enabling smart, connected and differentiated applications across technology's biggest megatrends, including Machine Learning, 5G Wireless, Embedded Vision, Industrial IoT and Cloud Computing and more.

If you are a passionate, innovative and an out-of-the-box thinker that enjoys challenging projects, Xilinx is the right place for you. Our global team is growing and we are looking for bold, collaborative, and creative people to help deliver groundbreaking technologies that enable our customers to differentiate. Come do your best work and live your best life through collaboration, wellness and giving back to your community as a member of the ONEXILINX team.


      Iterative Component Verification and Validation
      • Supports Test Engineering in the setting up of valid test verification criteria and plans at the system level
      • Creates and tracks schedules to ensure that component deliveries achieve technical and quality objectives per specifications in a timely manner
      • Ensures seamless component integration, device manufacturability, and sign-off acceptability based on formal verification test data
      • Mentors less experienced design engineers and leads experienced verification engineers in verification testing
      Process Adaptation and Optimization
      • Provides design management (e.g., CAD department) on the efficiency of proposed methods
      • Adopts and applies Xilinx formal, cross-COE process innovation to facilitate standardization and advance efficient time-to-market practices
      • Adopts and applies Xilinx formal revision control
      • Solid knowledge of required scripting and automation
      • Mentors junior design engineers on emerging methods and how best to integrate these into practice
      Verification and Validation
      • Creates verification plans at the block level
      • Understands protocols and standards associated with products
      • Collaborates with program management to verify that components meet technical specifications and quality requirements (e.g., power efficiency, area efficiency, ease of use)
      • Collaborates with other hardware and software groups to ensure effective component integration within the larger system
      • Supports Test Engineering or customer verification engineering teams in the setting up of valid test verification criteria and plans
      • Supports Applications Engineering in debugging customer issues
      • Troubleshoots component blocks as required to ensure milestone achievement and production-ready integration (e.g., specifications, performance, standards)
      • Manages regression suites for products, and contributes to the tool flow
      • Acts on verification test data to ensure seamless component integration, device manufacturability, and sign-off acceptability if applicable (e.g., customer sample feedback, iterative tape-out production turns involving 3rd parties)
      • When required, creates environment and infrastructure to test designs in a HW verification environment, and running test scenarios
      Requirements Assessment
      • Solid understanding of FPGA building blocks and how they relate
      • Provides input into feasibility studies for proposed features
      • Understanding of customer tool flow and use models
      • Design Enablement (Tools/System/Practice)
        • Exercises technical innovation in the use of standard design implementation tools and methods (e.g., circuit techniques)
        • Actively explores innovative design implementation tools or methods or their impact on implementation design practices (e.g., process excursions, boundary excess, signal passing of different voltages)
        • Stays current with and proposes the internal use of industry approaches, algorithms, and practices
        • Expert in technical innovation in the use of standard design implementation tools and methods (e.g. understands how to leverage the tool to have a positive impact on the design).
        • Aggregates and provides inputs to tool developers and vendors on issues to improve the tools.
        • Actively explores innovative design implementation tools or methods and their impact on implementation design practices and makes recommendations for tool acquisition (e.g., OVM and Questa)
        • Stays current with and proposes the internal use of industry approaches, algorithms, and practices (e.g. state of the art DSP algorithms).
        • Proposes the solution of FPGA-specific problems with tool vendors.

 

Candidate should be

- Self Driven engineer having hands on verification experience using SV UVM

- Able to develop the test environment from scratch, develop test plans and checkers using assertions and advanced

methodologies like UVM, OVM etc

- Verification using formal techniques like Assertion based verification is added advantage.

- Design concepts, Knowledge of system-level architecture including buses like IOs, bridges, memory controllers, Phy

Layer Knowledge.

- Strong working knowledge of SV under UVM guidelines, UNIX environment and scripting languages such as Perl

or Python, Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi,

ModelSim.

Experience using UNIX Revision Control tools - Subversion, RCS, CVS, Perforce and bug tracking tools such as

Bugzilla.

- Experience in verifying multimillion gate chip designs from specification

Education Requirements

 

Gradute/Masters in Engineering

 

Years of Experience

7-10 yrs

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