UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Senior Design Verification Engineer

154111
San Jose, CA, United States
Feb 6, 2018

Share:

Job Description

Description

Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics. Among the broad range of end markets we serve are:

  • Aerospace/Defense
  • Automotive
  • Broadcast
  • Consumer
  • High Performance Computing
  • Industrial / Scientific / Medical (ISM)
  • Wired
  • Wireless


FDST Verification group is looking for a Senior Design Verification Engineer to provide technical leadership, contribution on FPGA  block, sub-system and full chip verification. The individual will help design, develop and use simulation and/or formal based verification environments, at block, sub system and full chip FPGA level, to prove the functional correctness of FPGA SoCs.

 

The ideal candidate is one who has a proven track record on driving strategies and successful verification execution on high performance IPs and/or SoC designs. Candidate is expected to be a strong team player with good communication and leadership skills and one who is able to positively and strategically influence the FPGA design teams with an eye towards improving overall product quality.

 

  • Qualifications:
    • Bachelor's Degree w/ 5+ years or MS w/ 3+ years or PhD w/ 0 years in Electrical Engineering, Computer Engineering, or Computer Science.
    • Requires proven track record in technical leadership. This includes planning, execution, tracking, verification closure, and delivery to programs.
    • Requires strong experience with development of UVM, OVM, VMM and/or Verilog, SystemVerilog test benches for full chip testbench and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test full chip FPGA fabric and SoCs.
    • Requires strong understanding of state of the art of verification techniques, including assertion and metric-driven verification.
    • Verification experience in MathEngine/DSP optimized for wireless applications, AXI, NoC, HBM, DDR4, PCIe verification is a plus.
    • Verification experience in full chip verification is a plus.
    • Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus.
    • Strong understanding of different phases of ASIC and/or full custom chip development is required.
    • Experience in modeling SystemC and using SystemC based models in verification is a plus.
    • Experience with FPGA programming and software is a plus.
    • Verification experience in  PCIe, Processors, Graphics is a plus.
    • Experience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (Magellan) is a plus.
    • Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus.
    • Some DFX/DFT and UPF/ power-ware - simulation experience is a plus

     

Share:

Similar Jobs

Senior Software Engineer (DevOps)

San Jose, CA, United States

System Validation Engineer

San Jose, CA, United States

Corporate Events Program Manager

San Jose, CA, United States

Senior Engineer RTL Design

San Jose, CA, United States

Cloud Technology Intern

San Jose, CA, United States

FPGA Fabric Architecture

San Jose, CA, United States

NPI Planner / Supply Chain Analyst

San Jose, CA, United States

Writer/Communications Project Specialist

San Jose, CA, United States

Senior STA Timing Design Engineer

San Jose, CA, United States

Senior Marketing Campaign Manager

San Jose, CA, United States

Datacenter Field Applications Engineer

San Jose, CA, United States

Director of Strategic Planning and Operations

San Jose, CA, United States

Legal Team Intern

San Jose, CA, United States

Staff Technical Sales Engineer

San Jose, CA, United States

Datacenter Ecosystem & Partner Manager

San Jose, CA, United States

CAD Engineer (EM/IR)

San Jose, CA, United States

Staff Treasury Analyst

San Jose, CA, United States

Staff Software Engineer (Systems)

San Jose, CA, United States

Senior Design Engineer

San Jose, CA, United States

Design Engineer (Memory Interface Design)

San Jose, CA, United States

Staff Design Engineer (DSP Architecture)

San Jose, CA, United States

Staff Design Engineer (Analog/Mixed-signal)

San Jose, CA, United States

For technical assistance, please contact xilinx_ta_support@xilinx.com