Senior Verification Test Engineer

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Hardware Engineering
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153132 Requisition #
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Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics. Among the broad range of end markets we serve are:

  • Aerospace/Defense
  • Automotive
  • Broadcast
  • Consumer
  • High Performance Computing
  • Industrial / Scientific / Medical (ISM)
  • Wired
  • Wireless

 


Successful candidate will have an exciting opportunity to develop and implement efficient test solutions for leading edge IO interface for the next generation of FPGA devices.

 

The test solution will be used in volume production testing environment.
 

Key responsibilities include but not limited to the following:

  • Define, develop, implement, and support production test solutions for the IO Interface in the latest generation of  FPGAs
  • The test solutions utilizing FPGA IP cores, memories, processors, and interconnect, will be developed in the FPGA environment using Verilog, with Xilinx’s Vivado tools to provide test coverage for all configurations of the IO Interface
  • Optimize test implementation to achieve high test coverage and fast throughput
  • Verify functionality and fault coverage through pre-silicon simulation
  • Debug test patterns to understand failure mechanisms and improve yield
  • Write custom automation tools to facilitate pattern generation and measure test coverage
  • Work closely with IC Design, Software Engineering, Product Verification Team, Product and Test teams at all geographical locations, to ensure timely delivery of robust test solutions
  • Bachelor Degree in Electrical Engineering/IC Design
  • 4+ years of relevant experience in IC Design, application or testing of VLSI
  • Familiarity with FPGA designs using FPGA design tools and methodologies is a plus
  • Proficient use of verification EDA tools such as Cadence/Synopsys (simulation, fault grading, schematic and waveform viewing)
  • Knowledge of IO Interface standards/protocols and IO system testing/validation
  • Knowledge of ATE test platforms, as well as use of bench test equipment.
  • Experienced with UNIX, and programming languages such as Perl and/or C/C++
  • Good communication skills and works well in a group environment that spans across continents

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