Design Software Verification Engineer

📁
Software Engineering
📅
153457 Requisition #
Thanks for your interest in the Design Software Verification Engineer position. Unfortunately this position has been closed but you can search our 219 open jobs by clicking here.

Required:

  • Honours Bachelors/Masters degree in Electronics/Electrical/Computer Engineering or related courses
  • Good understanding of VHDL or Verilog
  • Excellent organization, teamwork, communication and interpersonal skills
  • Superior analytical and problem-solving skills and high motivation to learn

Desired:

  • Experience of verification or design roles for ASIC or FPGA
  • Experience with PERL and/or TCL scripting
  • Good understanding of C or C++
  • Knowledge of Software Development & Test methodologies

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