Design Engineer - Architecture Models and Tools Development

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Design Engineering
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153700 Requisition #
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Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics. Among the broad range of end markets we serve are:

  • Aerospace/Defense
  • Automotive
  • Broadcast
  • Consumer
  • High Performance Computing
  • Industrial / Scientific / Medical (ISM)
  • Wired
  • Wireless


Xilinx is looking for highly qualified individuals to join our FPGA Architecture 
Development group. In this position, the candidate will be part of a global, multi-s
ite team focusing on chip level RTL modeling, and custom automation tools 
and framework development for next generation FPGA and programmable SoC 
products.

Responsibilities include:
  • Building chip level RTL connectivity and other models; verifying models match architectural intent
  • Architecting, building, and maintaining robust automation tools, methodologies and frameworks using Perl and other dynamic scripting languages to improve development efficiency and quality
  • Working closely with hardware engineering and verification teams to understand functionalities and requirements, and ensure automatability in development processes and solutions
  • Contributing to automation infrastructure improvements
  • Implementing and helping team to embrace best automation practices to maintain quality
Requirements:
  • A Bachelor degree in Electrical/Computer Engineering, Computer 
    Science or equivalent fields with at least 3 years of relevant experience
  • Experience architecting, building, and maintaining CAD-related development/automation tools and frameworks
  • Strong knowledge of Linux/Unix environment and dynamic scripting language programming in Perl; experience in other scripting/programming languages such as Python, Tcl, C/C++, etc. is a plus
  • Strong foundation in object-oriented programming, data structures, and algorithms
  • Experience in RTL and behavioral coding, preferably with Verilog and SystemVerilog
  • Experience with all stages of ASIC design flow, including verification methodologies and tools (UVM/OVM, formal methods, lint tools, etc.)
  • Excellent problem-solving skills, working within complex systems
  • Independent self-starter, positive work attitude, and highly motivated
  • Strong written and verbal communication skills - able to write design specifications and test plans, conduct peer reviews, and ability to work well in a global, multi-site team
  • Experience in circuit design, debug, and verification is a plus
  • Experience using FPGAs, understanding FPGA architectures is a plus
  • Experience with FPGA programming and software is a plus

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