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Design Engineering
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153726 Requisition #
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Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics. Among the broad range of end markets we serve are:


 

  • Aerospace/Defense
  • Automotive
  • Broadcast
  • Consumer
  • High Performance Computing
  • Industrial / Scientific / Medical (ISM)
  • Wired
  • Wireless

 

Artificial Intelligence and Deep Learning are introducing revolutionary improvements in computer vision, speech translation, autonomous driving etc and radically transforming diverse industries.

The new AI workloads have demanding processing requirements - FPGAs are ideally suited for highly parallel workloads that require reconfigurable and reprogrammable hardware acceleration.

 

Xilinx FPGAs are already poised to revolutionize datacenter acceleration with the adoption of FPGAs in hyperscale datacenter such as Amazon and other tier-1 hyperscale customers.

Come and join the exciting team that is developing a suite of cutting edge FPGA DNN IP targeting highest performance and power efficiency for a variety of CNN and RNN workloads enabling top worldwide customers.

 

Responsibilities:
  • Lead the architecture, design, implementation of latest deep learning FPGA IP and solutions
  • Work with marketing and lead customers to understand requirements of end to end AI processing pipeline,, identify key requirements and lead the definition of the deep learning IP roadmap
  • Interfacing with Deep Learning Software architecture teams for integration with industry leading software stacks
  • Work with Hyperscale datacenter and embedded customers to integrate with Xilinx acceleration platform and end applications
  • Define and develop reference design and applications to showcase capabilities of developed IP

Qualifications:

 

  • Deep understanding of latest deep neural networks (CNN/RNN networks such as GoogleNet, ResNet, LSTM etc) and their applications
  • A minimum 7 years' experience with end-to-end architecture definition and development of RTL IP including design, verification and validation
  • Demonstrated experience with FPGA design including DSP designs and understanding of floating point and fixed point architectures and quantization techniques
  • Experience with methodology, techniques and tradeoffs for DNN/RNN training and inference
  • Strong understanding of software integration with frameworks such as Caffe, MxNet, TensorFlow etc
  • Excellent written and verbal communication skills

 

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